[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
Re: [linrad] RE: Detecting phase modulation with undersampling
This seems like a fully digital RF lock-in amplifier, of which I have not seen an off-the-self model.
Disclaimer: I'm a Software Developer and amateur EE.
How about this?
R = real reference signal sampled at 65MHz
S = real signal of interest sampled at 65MHz
Down-convert R and S separately to two low bandwidth/sample rate complex signals, possibly with a
CIC[1] filter but there is probably a better method, since CIC is well suited for FPGAs and ASICs.
At this point you could divide S by R (since the sample rate will be relatively low on the order of
5KS/s the c6701 may be able to handle it). The resulting complex signal could be filtered some more
to reduce the noise. At which point you could send the data up to the PC for storage, display, and
further analysis.
You may also want to replace the R signal after down-converting with a PLL reference, but that sort
of analysis is beyond me.
ref 1: http://www.dspguru.com/info/tutor/cic.htm
Dr. David Kirkby wrote:
<Snip>
--
Krzysztof Kamieniecki
callsign:KB1KLB
mailto:krys@xxxxxxxxxxxxxxx
LINRADDARNIL