Hi Group,

I've just taken an oscilloscope to the Mintron camera. Here's the word on shutter speed. It is indeed real extended shutter lengths of up to two seconds. Kudos to Richard on saying this all along!

What I did was to find the spec sheets for the Vertical Clock Driver and to deduce the locations of the Horizontal and Reset Gate functions. I monitored the Substrate Clock pin with the O'scope under "normal" video mode. The Substrate Clock is the electronic shutter signal which transfers the photo-pixel charge to the Vertical hift resisters. It strictly defines the on-chip integration time.
The results were as expected, the Substrate Clock pulsed once every 16 mS. Next, I went to Sense X2, the clock pulsed once every 32 mS. I went step by step, all the way up to X128 which yielded a clock pulse every 2 seconds. I paid particular attention to X32, X64, and X128, watching it definitely go over two seconds. This would have been easier with a storage scope but I am 99% certain that I wasn't missing any pulses. This was a little tricky because my camera does not have the dual 16 pin / 20 pin layout on the CCD board, it has a second 16 to 20 pin piggybacked adaptor board. I also had to download pdf's for the 16 pin HAD's to figure out where everything went. Of course holding the scope probe on the various nodes was no picnic either. It is worth noting that both chips accompanying the CCD on the daughter board are just Vertical and Horizontal drivers similar to the older Sony chip sets. They get their timing signals from wholly from the motherboard. These are not similar to the current newer chip sets.

Now the signal exits the CCD and immediately goes to a FET. It leaves the FET on a trace which is surrounded by fat ground traces. This is type of shielding called "ground plane shielding". It enters the Flex Strip assembly on pin #2 and is again surrounded on both sides by the grounded pins #1 and #3. The signal continues on hrough the flex strip and exits onto the motherboard and immediately to the Hitachi 10 bit A/D converter via a capacitor to remove the DC component. The A/D uses a sample and hold analog form of Double Correlated Sampling to reduce noise by measuring the charge signal on a differential basis. It first measures a pixel reference level then the pixel actual charge and digitizes the difference.

The A/D sends 10 short-run parallel bit lines to the Mintron 88128 Digital Signal Processing chip. The only information I have beyond the standard Mintron blurb is that it is capable of over 20 MIPS (million instructions per second).

As suspected by several on this group (Sandy and Rein), the chip with the empty identical pattern next to it is a memory chip. It is a 16M DRAM designed for graphics and DSP processing. Configured as 1Meg X 16 bit.

I have downloaded pdf's for several other chips but they are scattered about my hard drive. I will post them when I find them. Several other chips are still a mystery. I shall pursue the generation of the clocking signals to be certain of their origin. I do know that another ground plane shielded trace leaves the afore mentioned Mintron 88128. Care was taken to engineer its path, which eventually leads to the flex strip and onto the CCD board. I scoped this signal and it looks like it may be the Reset Gate pulse, which along with the Horizontal Clocks, is of the highest frequency at the CCD. It is however of much shorter duration than the Horizontal Clocks which may explain the extra care. All this points toward the 88128 as the principal timing controller. I am absolutely notcertain of this though! Another attack would be to figure out where the 28.626 Mhz oscillator goes to.

Some thoughts and questions:
-Amp off modification; At 2 seconds maximum shutter, will the mplifier have time to reach stability? If it did reach it, how much time would it cut out of the 2 seconds?
-The nature of the DRAM; Now that it is certain that off chip frame summing is not occurring, what does this chip do? Is it simply to provide the constant video feed signal for that "continuous" look?
Or maybe data is bouncing back and forth between it's storage and the DSP.
-Where does the digital domain (from the DSP) get changed back to the analog for NTSC output?
-It is curious to note that both the Vertical and Horizontal pulses were flogging away the whole time a 2 second integration was occurring. Yet readout time must be somewhere around 14 mS.
-What the hell does that other giant chip do if the 88128 does double duty as timing controller and DSP?

Here's some links. Watch word wrap on all of these!

Memory Chip

Vertical Driver: On the CCD board is a 7221X01, 20 pin chip. This is manufactured by Samsung. It is a Vertical Driver/Timing and Sync Generator for B&W CCD's. It appears to be very similar in function to the Sony CXD1261AN which predates the 2463. The exact pinouts differ from the 1261 but all the same functions are there.

7221X01 Vertical Driver

Hitachi, 10 Bit A to D Converter

Have Fun,

Dan

From: "observer35"
Date: Fri Dec 6, 2002 10:47 pm
Subject: Re: Mintron Shutter Truth

Hello Dan,

That's quite some job and research you did there. It will be the source for my studying the 12V series cameras for some time to come as well as the subject of some future communications....

Thanks and regards

Rein Smit

From:"wlbehrens"
Date: Sat Dec 7, 2002 12:21 am
Subject: Re: Mintron Shutter Truth

The vertical pulses to the CCD must also be stopped for "true" integration to occur. With the vertical registers being clocked the charge in the wells will be clocked out. Your more than likely still integrating in the DRAM. You have to have both the substrate clock and vertical clock off to disable clearing of the charges in the wells and allow the array to build up a charge. The substrate clock does not really clear the chip by itself but when clocked disables the ability of the wells to gather a charge. The vertical clock clears the wells by clocking out the charge from the wells. You can completely disable the shutter and the array will be read out at the vertical clock rates. If you disable the vertical clock and not the shutter then you will only integrate during those times the shutter is not closed. True integration will occur when both the shutter and vertical clock are disabled.

William

From: "observer35"
Date: Sat Dec 7, 2002 12:24 am
Subject: Re: Mintron Shutter Truth

Hi Dan and the group,

Not having actually seen the camera or used it, let me ask "Is there a specific action to put the camera in the low light mode?" I guess, it is when one selects "SENSE"

In the non starlight mode, the shutter must be working as normal. After all, it is a course AGC control and in high light environments there must be a way to choke the light in order to prevent the CCD from getting saturated.

Once in the low light mode the shutter is kept open. I think, changes in the shutter are hard to process due to the response time of the shutter control. I only way is to keep it constant and not oscillating, is to hold it wide open.

The observation on the transfer pulse is very interesting. I am just wondering how the image is formed during the integration period. Is the image constructed from the data which have been accumulated and stored, so far? What is the rate of image updates ( frame rate ) during that time, 30 or 60 hz ?

After you have accumulated for 2 plus seconds, what happens, does it restart by it self? What happens to the output image? Does it go back to the 1 - 2 - 4 etc accumulation results so far in the run. Or in other words, does the output go from images with low Signal/Noise to high S/N.

Unrelated question:
Is there an external start for the exposure process. Do you think that it can be added. If one wants to use the camera and control it under software. It is so much easier if one has an external startsignal.

Anyway this could become a lot of fun,

Regards,

Rein Smit

From: "otlski"
Date: Sat Dec 7, 2002 7:11 am
Subject: Re: Mintron Shutter Truth

William, thank you for the response. Could you clear up three things for me? Please bear in mind that I respect your knowledge and I have a thirst to understand this.

First, given your explanation, it would also makes sense that the substrate pulse must then also occur once every 1/60 second. If both the substrate clock and the verticals always need work in conjunction, how can the "DRAM integrating" fast shutter occur with the substrate clocked at only every two seconds.

Second, take the example of normal 1/60 second fields video and the Sony 2463 based chip set. There is only 16 mS available before NTSC expects the next field. It looks like to me that the total field readout time is approximately 14 mS. If the field exposure is 16 mS, there appears to be significant overlap required. This suggests to me that an Odd field readout happens simultaneously with an Even field exposure.

Third, (this dovetails with the above paragraph) please read this page and tell me what you think. This camera uses the Ex-view HAD technology. Here's the paragraph:

[In "Normal" mode, CCD is operated with conventional clocking scheme which offers standard sensitivity, but allows high throughput by way of "overlap" exposure-readout modes. When the exposure time is longer than the readout time, exposure and readout are overlapping to maximize the frame rate. This is accomplished by quickly shifting the image under the mask/storage area. While this frame is being readout, exposure for the next frame is initiated. If the exposure time is less than the readout time, camera will operate in "non-overlap" mode in the sense that readout follows exposure. When acquiring a sequence of images this mode eliminates the dead time between exposures and the overhead of readout time. This mode will only operate if the trigger mode has not been selected.]

Here is the link

Thank You,

Dan

From: "otlski"
Date: Sat Dec 7, 2002 7:49 am
Subject: Re: Mintron Shutter Truth

Hi Rein,

Here's some information.

Yes, when you select "Sense" the camera goes into integration mode. I believe the shutter is then completely taken over by the microprocessor ignoring any user selected setting. My certainty is better than 60%. Gain however is still controllable both manually and automatically.

> Not having actually seen the camera or used it, let me ask "Is there a specific action to put the camera in 
>the low light mode?" I guess, it is when one selects "SENSE"

In the normal video mode the electronic shutter is able to be autoselected by the microprocessor. It can be over-ridden manually as well.

> In the non starlight mode, the shutter must be working as normal. After all it is a course AGC control 
> and in high light environments there must be a way to choke the light in order to prevent the CCD from getting 
>saturated.

Keeping in mind that this is not a mechanical shutter, I think you are correct in a sense.

> Once in the low light mode the shutter is kept open. I think, changes in the shutter are hard to process 
>due to the response time of the shutter control. I only way is to keep it constant and not oscillating, is 
>to hold it wide open.

When going from 1/60 second to 2 seconds, the images slowly and constantly brightens as time passes. It takes about 2 minutes for the full X128 mode to be reached. During this two minute period, the video update rate slows in concert with the brightening. When the O'scope is monitoring the substrate clock, you can see the distance between pulses gradually increasing and exactly synchronized with the video update and the successive brightening.

 
> The observation on the transfer pulse is very interesting. I am just wondering how the image is formed 
>during the integration period. Is the image constructed from the data which have been accumulated and
> stored, so far? What is the rate of image updates ( frame rate ) during that time, 25 or 60 hz ?

> No, the image output does not go from images with low Signal/Noise to high S/N. It is held. There is absolutely > no change even at the background noise level. > > After you accumulated for 2 plus seconds, what happens, does it restart by it self? What happens to the output > image? Does it go back to the 1 - 2 - 4 etc. accumulation results so far in the run. Or in other words, does > the output go from images with low Signal/Noise to high S/N.